The Dual Independent Bus (DIB) architecture, originally put into practice in the Pentium Pro processor, was designed to improve processor bus bandwidth. By having two independent buses, the Pentium II processor is able to access data from either of them at the same time. The main processor bus, commonly referred to as the front-side processor bus, is the interface between the processor and the motherboard or chipset. In a processor with DIB, the L2 cache is located on the second bus (backside), enabling it to operate at much faster speeds than if it was sharing the main processor bus.